電機工程學系

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歷史沿革

本系成立宗旨在整合電子、電機、資訊、控制等多學門之工程技術，以培養跨領域具系統整合能力之電機電子科技人才為目標，同時配合產業界需求、支援國家重點科技發展，以「系統晶片」、「多媒體與通訊」、與「智慧型控制與機器人」等三大領域為核心發展方向，期望藉由學術創新引領產業發展，全力培養能直接投入電機電子產業之高級技術人才，厚植本國科技產業之競爭實力。

本系肇始於民國92年籌設之「應用電子科技研究所」，經一年籌劃，於民國93年8月正式成立，開始招收碩士班研究生，以培養具備理論、實務能力之高階電機電子科技人才為目標。民國96年8月「應用電子科技學系」成立，招收學士班學生，同時間，系所合一為「應用電子科技學系」。民國103年8月更名為「電機工程學系」，民國107年電機工程學系博士班成立，完備從大學部到博士班之學制規模，進一步擴展與深化本系的教學與研究能量。

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Author: search.filters.author.Chien-Hung KuoSubject: search.filters.subject.magnetic sensor

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    CMOS oversampling ΔΣ magnetic-to-digital converters
    (IEEE Solid-State Circuits Society, 2001-10-01) Chien-Hung Kuo; Shr-Lung Chen; Lee-An Ho; Shen-Iuan Liu
    In this paper, two CMOS oversampling delta-sigma (ΔΣ) magnetic-to-digital converters (MDCs) are proposed. The first MDC consists of the magnetic operational amplifier (MOP) and a first-order switched-capacitor (SC) ΔΣ modulator. The second one directly uses the MOP to realize a first-order SC ΔΣ modulator. They can convert the external magnetic field into digital form. Both circuits were fabricated in a 0.5-μm CMOS double-poly double-metal (DPDM) process and operated at a 5-V supply voltage and the nominal sampling rate of 2.5 MHz. The dynamic ranges of these converters are at least ±100 mT. The gain errors within ±100 mT are less than 3% and the minimum detectable magnetic field can reach as small as 1 mT. The resolutions are 100 μT for both of the two MDCs. The measured sensitivities are 1.327 mv/mT and 0.45 mv/mT for the first and the second MDC, respectively
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    Magnetic-to-Digital Converters Using Single-Amplifier-Based Second-Order Delta-Sigma Modulators
    (Institute of Electrical and Electronics Engineers (IEEE), 2004-04-01) Chien-Hung Kuo; Shr-Lung Chen; Shen-Iuan Liu
    In this paper, two magnetic-to-digital converters (MDCs) using single-amplifier-based second-order delta–sigma modulators (DSMs) are presented to detect the dc magnetic field. The proposed second-order DSM required only a single-operational amplifier to achieve the second-order noise shaping. Both the proposed circuits have been fabricated in a 0.5- m CMOS DPDM process, and the resolution of 11 bits can be achieved. The measured sensitivities are 1.486 and 0.459 mV/mT, and the minimum detectable magnetic fields are 0.6 mT and 0.4 mT for the MDC with and without the pre-amplifier, respectively. Both the measured nonlinearities are smaller than 1.3% within the range of 100 mT.