A 91dB SOP-Based Low-Voltage Low-Distortion Fourth-Order 2-2 Cascaded Delta-Sigma Modulator
dc.contributor | 國立臺灣師範大學電機工程學系 | zh_tw |
dc.contributor.author | Chien-Hung Kuo | en_US |
dc.contributor.author | Shuo-Chau Chen | en_US |
dc.contributor.author | Kang-Shuo Chang | en_US |
dc.date.accessioned | 2014-10-30T09:28:40Z | |
dc.date.available | 2014-10-30T09:28:40Z | |
dc.date.issued | 2006-11-01 | zh_TW |
dc.description.abstract | In this paper, a low-voltage switched-opamp-based 2-2 cascaded switehed-capacitor delta-sigma modulator in a 0.18-μm 1P6M CMOS technology is presented. The fourth-order modulator is realized using a low-distortion feed-forward topology to promote its linearity and dynamic range. The presented modulator can be operated in a wide range of supply voltage from 1.8V to 0.9V. The switched-opamp with double output stage is utilized to combine with the double-sampling technique so that the effective clocking rate can be reduced, thus also relaxing the requirement of opamp. The modulator achieves a 91 dB of SNDR within 24 kHz signal bandwidth under a 2 MHz of clocking rate. The total power consumption of this modulator is 0.86 mW under a 1V supply voltage and the chip core area is 1.57mm2. | en_US |
dc.identifier | ntnulib_tp_E0610_02_002 | zh_TW |
dc.identifier.uri | http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/32211 | |
dc.language | en | zh_TW |
dc.relation | The 4th IASTED International Conference on Circuits, Signals and Systems, San Francisco, pp. 199-204. | en_US |
dc.title | A 91dB SOP-Based Low-Voltage Low-Distortion Fourth-Order 2-2 Cascaded Delta-Sigma Modulator | en_US |