A Third-Order Four-Bit Delta-Sigma Modulator with MCIFF Structure for Wideband Applications
dc.contributor | 國立臺灣師範大學電機工程學系 | zh_tw |
dc.contributor.author | Chien-Hung Kuo | en_US |
dc.contributor.author | Chien-Yu Chen | en_US |
dc.date.accessioned | 2014-10-30T09:28:41Z | |
dc.date.available | 2014-10-30T09:28:41Z | |
dc.date.issued | 2008-08-20 | zh_TW |
dc.description.abstract | This paper presents a third-order low-distortion multi-bit delta-sigma modulator for wideband applications. The modified cascade integrators with distributed feedforward (MCIFF) structure without summer in front of quantizer is realized to save the power consumption in the presented modulator. The impact of the nonlinearity of opamp on the presented multi-bit MCIFF modulator is discussed. The prototype circuit is realized in the third-order 4-bit ΔΣ modulator, which has been fabricated in 0.18μm 1P6M CMOS process. The simulated signal-to-noise plus distortion ratio (SNDR) of the modulator within a 200 kHz of bandwidth under a 13.76 MHz of clock rate is 100.53 dB. The total power consumption of the modulator is 5.03 mW at a 1.8 V of supply voltage. | en_US |
dc.identifier | ntnulib_tp_E0610_02_007 | zh_TW |
dc.identifier.uri | http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/32216 | |
dc.language | en | zh_TW |
dc.relation | The 6th IASTED International Conference on Circuits, Signals and Systems, Hawaii, USA. | en_US |
dc.subject.other | Delta-sigma modulator | en_US |
dc.subject.other | low-distortion | en_US |
dc.subject.other | CIFF | en_US |
dc.subject.other | input feedforward | en_US |
dc.title | A Third-Order Four-Bit Delta-Sigma Modulator with MCIFF Structure for Wideband Applications | en_US |