A 30-60GHz CMOS sub-harmonic IQ de/modulator for high data-rate communication system applications
| dc.contributor | 國立臺灣師範大學應用電子科技學系 | zh_tw |
| dc.contributor.author | Wei-Heng Lin | en_US |
| dc.contributor.author | Wei-Lun Chang | en_US |
| dc.contributor.author | Jeng-Han Tsai | en_US |
| dc.contributor.author | Tian-Wei Huang | en_US |
| dc.date.accessioned | 2014-10-30T09:28:46Z | |
| dc.date.available | 2014-10-30T09:28:46Z | |
| dc.date.issued | 2009-01-22 | zh_TW |
| dc.description.abstract | A 30-60 GHz sub-harmonic IQ de/modulator using TSMC CMOS 0.13-mum process is presented in this paper. The IQ de/modulator consists of two FET resistive mixers, a 90deg coupler, and a Wilkinson power divider. The resistive mixer could simultaneously used as a up-converted or a down-converted mixer. Therefore, the measurement of the FET resistive mixer based modulator or demodulator will be done. The die size is 0.78 mm times 0.58 mm. Both IQ demodulator and modulator feature the conversion loss of -16plusmn1 dB and good demodulation and modulation capacity. | en_US |
| dc.description.uri | http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4957388 | zh_TW |
| dc.identifier | ntnulib_tp_E0611_02_014 | zh_TW |
| dc.identifier.uri | http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/32273 | |
| dc.language | en | zh_TW |
| dc.relation | IEEE Radio and Wireless Symposium (RWS 2009),San Diego, CA,pp462 - 465 (EI, NSC 96-2219-E-002-021, and NSC 97-2219-E-002-021) | en_US |
| dc.subject.other | Demodulator | en_US |
| dc.subject.other | modulator | en_US |
| dc.subject.other | CMOS | en_US |
| dc.subject.other | directconversion | en_US |
| dc.subject.other | sub-harmonic. | en_US |
| dc.title | A 30-60GHz CMOS sub-harmonic IQ de/modulator for high data-rate communication system applications | en_US |