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理學院
資訊工程學系
學位論文
學位論文
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http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/73912
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search.filters.author.Cheng, Po-Sheng
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search.filters.author.鄭博升
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search.filters.subject.FPGA
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search.filters.subject.Quantization
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search.filters.subject.Systolic Array
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search.filters.subject.Weight Stationary
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search.filters.subject.卷積計算
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以矩陣乘法為基礎應用硬體加速器於一維卷積計算之研究
(
2022
)
鄭博升
;
Cheng, Po-Sheng
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隨著電腦計算能力的提升,人工智慧得以受惠於大量的卷積計算來取得資料的特徵,使電腦可以幫我們處理各種複雜的任務。在提升卷積計算的速度的研究中,以矩陣乘法來實作卷積計算是常見的一種方式。本論文針對一維的卷積計算,提出一種矩陣排列的方式,將一維卷積計算得以用矩陣乘法來達成,並且進一步的使用通用型硬體加速器,來大幅提升矩陣乘法的計算效能。將本論文的方法應用於神經網路模型,並佈署在FPGA開發版上,經過實驗的驗證,我們可以精準的產出計算結果,並且加速整體神經網路模型的計算效能。
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